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| MIC5821/5822 Micrel MIC5821/5822 8-Bit Serial-Input Latched Drivers General Description BiCMOS technology gives the MIC5821/5822 family flexibility beyond the reach of standard logic buffers and power driver arrays. These devices each have an eight-bit CMOS shift register, CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sink Darlington output drivers. The 500mA outputs are suitable for use with incandescent bulbs and other moderate to high current loads. The drivers can be operated with a split supply where the negative supply is down to -20V. Except for maximum driver output voltage ratings, the MIC5821 and MIC5822 are identical. These devices have greatly improved data-input rates. With a 5V logic supply they will typically operate faster than 5 MHz. With a 12V supply significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL and DTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines. Features * * * * * * 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Down or Pull-Up Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Single or Split Supply Operation Ordering Information Part Number MIC5821BN MIC5822BN Temperature Range -40C to +85C -40C to +85C Package 16-Pin Plastic DIP 16-Pin Plastic DIP 7 Functional Diagram Pin Configuration CLK 1 CLOCK 5 8-BIT SERIAL-PARALLEL SHIFT REGISTER 1 16 15 14 LATCHES SERIAL DATA IN SERIAL DATA OUT VDD OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 SERIAL DATA IN 2 V SS VDD SERIAL DATA OUT 3 4 5 6 7 8 SUB 2 4 SHIFT REGISTER VSS 3 LATCHES 6 STROBE 13 12 11 10 9 7 MOS Bipolar OUTPUT ENABLE (ACTIVE LOW) STROBE OUTPUT ENABLE Sub 8 16 15 14 13 12 11 10 9 GND VEE VEE OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 (Plastic DIP) October 1998 7-37 MIC5821/5822 Micrel Typical Input Circuits Absolute Maximum Ratings (Note 1) at 25C Free-Air Temperature and VSS = 0V (MIC5821) 50V (MIC5822) 80V Output Voltage, VCE SUS (MIC5821)(Note 3) 35V (MIC5822)(Note 3) 50V Logic Supply Voltage, VDD 15V Input Voltage Range, VIN -0.3V to VDD + 0.3V VDD - VEE 25V Emitter Supply Voltage, VEE -20V Continuous Output Current, IOUT 500mA Package Power Dissipation, PD(Note 1) 1.67W Operating Temperature Range, TA -55C to +85C Storage Temperature Range, TS -65C to +150C Output Voltage, VCE Note 1: Derate at the rate of 16.7mW/C above TA = 25C. Note 2: CMOS devices have input static protection but are susceptible to damage when exposed to extremely high static electrical charges. Note 3: For inductive load applications. V DD STROBE OUTPUT ENABLE V SS V DD Typical Output Driver OUT N CLOCK SERIAL DATA IN 7.2K 3K VEE V SS SUB Maximum Allowable Duty Cycle (Plastic DIP) Number of Outputs ON (IOUT = 200mA VDD = 12V) 8 7 6 5 4 3 2 1 Maximum Allowable Duty Cycle at Ambient Temperature of 25C 73% 83% 97% 100% 100% 100% 100% 100% 40C 62% 71% 82% 98% 100% 100% 100% 100% 50C 55% 62% 72% 87% 100% 100% 100% 100% 60C 47% 54% 63% 75% 93% 100% 100% 100% 70C 40% 46% 53% 63% 79% 100% 100% 100% 7-38 October 1998 MIC5821/5822 Micrel Electrical Characteristics at TA = 25C VDD = 5V, VEE = VSS = 0V (unless otherwise specified) Applicable Characteristic Output Leakage Current Symbol ICEX Devices MIC5821 MIC5822 Collector-Emitter Saturation Voltage Input Voltage VIN(0) VIN(1) Both Both VDD = 12V VDD = 10V VDD = 5.0V Input Resistance RIN Both VDD = 12V VDD = 10V VDD = 5.0V Supply Current IDD(ON) Both One Driver ON, VDD = 12V One Driver ON, VDD = 10V One Driver ON, VDD = 5.0V All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) Both All Drivers OFF, VDD = 5.0V, All Inputs = 0V All Drivers OFF, VDD = 12V, All Inputs= 0V 10.5 8.5 3.5 50 50 50 4.5 3.9 2.4 16 14 8 1.6 2.9 mA k VCE(SAT) Both Test Conditions VOUT = 50V VOUT = 50V, TA = +70C VOUT = 80V VOUT = 80V, TA = +70C IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V Min. Limits Max. 50 100 50 100 1.1 1.3 1.6 0.8 V V Unit A Electrical Characteristics Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage VIN0) VIN(1) Input Resistance RIN Symbol ICEX TA = -55C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Test Conditions VOUT = 80V IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V VDD = 12V VDD = 5.0V VDD = 12V VDD = 10V VDD = 5.0V 10.5 3.5 35 35 35 5.5 4.5 3.0 16 14 10 3.5 2.0 mA k Min. Max. 50 1.3 1.5 1.8 0.8 V Unit A V 7 VCE(SAT) Supply Current IDD(ON) One Driver ON, VDD = 12V One Driver ON, VDD = 10V One Driver ON, VDD = 5.0V All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 5.0V October 1998 7-39 MIC5821/5822 Micrel Electrical Characteristics TA = +125C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Input Voltage VIN(0) VIN(1) Input Resistance RIN VDD = 12V VDD = 5.0V VDD = 12V VDD = 10V VDD = 5.0V Supply Current IDD(ON) One Driver ON, VDD = 12V One Driver ON, VDD = 10V One Driver ON, VDD = 5.0V All Drivers ON, VDD = 12V All Drivers ON, VDD = 10V All Drivers ON, VDD = 5.0V IDD(OFF) All Drivers OFF, VDD = 12V All Drivers OFF, VDD = 5.0V 10.5 3.5 50 50 50 4.5 3.9 2.4 16 14 8 2.9 1.6 mA k Symbol ICEX VCE(SAT) Test Conditions VOUT = 80V IOUT = 100mA IOUT = 200mA IOUT = 350mA, VDD = 7.0V Min. Max. 500 1.3 1.5 1.8 0.8 V Unit A V MIC5821/5822 Family Truth Table Serial Data Input H L X Clock Input Shift Register Contents I1 H L R1 X P1 L = Low Logic Level Serial Data Strobe Output Input R7 R7 R8 X P8 L H R1 P1 X I1 Latch Contents I2 I3 ...... I8 Output Enable I1 Output Contents I2 I3 ...... I8 I2 R1 R1 R2 X P2 I3 ...... I8 R2 ...... R7 R2 ...... R7 R3 ...... R8 X ...... X P3 ...... P8 R2 P2 X R3 ...... R8 P3 ...... P8 X ...... X L H P1 H P2 H P3 ...... P8 H ...... H H = High Logic Level X = Irrelevant P = Present State R = Previous State Timing Diagram CLOCK A B DATA IN E STROBE C F D OUTPUT ENABLE G OUT N 7-40 October 1998 MIC5821/5822 Micrel Timing Conditions (TA = +25C, Logic Levels are VDD and VSS) VDD = 5.0V A. B. C. D. E. F. G. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ....................................................................... 75 ns Minimum Data Active Time After Clock Pulse (Data Hold Time) ............................................................................. 75 ns Minimum Data Pulse Width .................................................................................................................................... 150 ns Minimum Clock Pulse Width ................................................................................................................................... 150 ns Minimum Time Between Clock Activation and Strobe ............................................................................................ 300 ns Minimum Strobe Pulse Width .................................................................................................................................. 100 ns Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns SERIAL DATA present at the input is transferred to the shift register on the logic "0" to logic "1" transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high during serial entry. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting the information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches. Typical Applications MIC5822 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply SERIAL DATA CLOCK -9V 7 1 2 16 15 4 5 6 0.1 7 8 SUB LATCHES +5V SHIFT REGISTER 3 14 13 12 11 10 9 + 100 October 1998 7-41 |
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